CVE detail

CVE-2023-34326 — CVE-2023-34326

Published 2024-01-05 · Modified 2026-06-17 · Vendor xen · Product xen · Source nvd

HIGH

severity

CVSS-derived band

7.8

CVSS v3

0–10 scale

0.0029

EPSS probability

exploitation probability, 30d

21.0%

EPSS percentile

percentile vs all CVEs

NOT LISTED

CISA KEV

known exploited catalog

Description

The caching invalidation guidelines from the AMD-Vi specification (48882—Rev 3.07-PUB—Oct 2022) is incorrect on some hardware, as devices will malfunction (see stale DMA mappings) if some fields of the DTE are updated but the IOMMU TLB is not flushed. Such stale DMA mappings can point to memory ranges not owned by the guest, thus allowing access to unindented memory regions.

Remediation

No vendor-published fix data in our corpus for this CVE. Check the references below or the vendor's PSIRT / security advisories page.

References

cvedb.io · NVD · CISA KEV · FIRST EPSS · vendor advisories (CVE Program List v5). Informational only, no warranty — verify every remediation against the vendor advisory before acting on it. This product uses data from the NVD API but is not endorsed or certified by the NVD, CISA, FIRST.org or any vendor named. CVE® is a registered trademark of The MITRE Corporation.